Topic: Vertical GaN MOS structures with semi-insulating channel for high-power switches
Supervisor: : Ing. R. Stoklas, PhD. (Department of III-V Semiconductors)
Co-advisor: Ing. J. Kuzmík, DrSc.
Description: Semi-insulating vertical GaN devices are a class of power semiconductor devices that utilize Gallium Nitride (GaN) material in a vertical configuration, offering significant advantages for high-voltage, high-current, and high-frequency applications. The semi-insulating GaN layer helps to reduce parasitic capacitance, mitigate leakage currents, and improve breakdown voltage, making these devices highly suitable for power electronics, RF amplifiers, and motor drives. By incorporating vertical structures, these devices achieve high current handling capabilities while maintaining efficient thermal management. The combination of GaN’s wide bandgap, high electron mobility, and semi-insulating properties results in improved performance, making vertical GaN devices an ideal choice for next-generation power systems. In vertical devices, it’s crucial to ensure uniform current flow across the entire device area. Structural modifications like current spreaders, channel over-growth or optimized electrode designs help mitigate current crowding effects, improving the channel’s performance. In addition, the channel over-growth process also enhances the interface quality between the gate and the GaN material, which is critical for device reliability and performance. A vertical MOS structure on GaN through channel over-growth is an advanced approach to fabricating high-performance electronic devices. This method involves over-growing a semiconductor layer to form a high-quality gate channel, typically using selective epitaxial growth. The configuration of the semi-insulating vertical GaN transistor designed by us is patented in Slovak Republic; A patent application has also been filed within the EU.
The main aims of the PhD thesis will be an understanding of the basic principles of the GaN vertical structures. Electrical characterization of vertical GaN devices involves assessing key parameters such as breakdown voltage, current-voltage characteristics, capacitance, and on-resistance. These metrics provide insights into the device performance under different operational conditions. High breakdown voltages and low on-resistances are particularly critical for optimizing device efficiency and minimizing energy losses. Mechanisms of failure, including thermal stress, gate oxide breakdown, and defect-related degradation will be also analysed.